BL7431A 256-bit eeprom logical encrypted chip http://www.belling.com.cn - 1 - 8/16/2006 total 4 pages description BL7431A is the memory card chip developed by shanghai belling co.,ltd.. the chip uses shanghai bellings 1.2um cmos & eeprom process. it has 256 bits eeprom(a type) or 512 bits eeprom(b type) with logical encryption function, its contact configuration is in accordance to iso standard 7816- 3(synchronous transmission). it can be used widely in intelligent public telephone area. c 1 c 2 c 3 c 7 c 6 c 5 v cc rst clk gnd n.c. i/o pin diagram features 256x 1bit e 2 prom(a type) 512 x 1bit e 2 prom(b type) read and write by bit, erase by byte logical encryption ensure the security of data and password typical eeprom program time is 5ms operation voltage 5v operation current <1ma minimal erase/write cycle 10 5 data retention: no less than 10 year in accordance to iso standard 7816-3(synchronous tr ansmission) pin description pin no. parameter symbol test condition 1 c1 v cc supply voltage 2 c2 rst control input (reset signal) 3 c3 clk clock input 4 c5 gnd ground 5 c6 n.c. not connected 6 c7 i/o bidrectional data line (open drain) function description block diagram
BL7431A 256-bit eeprom logical encrypted chip http://www.belling.com.cn - 2 - 8/16/2006 total 4 pages partition of eeprom memory function type after personalize address before personalize transmissio n password not verified before personalize transmissio n password verified second password not verified second password verified fg=1 function area1 0~15 rom rom rom chip manufacture code area2 16~23 rom prom rom card manufacture code area3 24~63 rom prom rom issue code area4 64 rom prom rom personalized flag 65~71 rom prom rom 72~79 prom eeprom rom used as error counter before personalization 80~103 rom(can not be read) eeprom rom store the transmission password before personalization after personalization, used as common memory area5 104~143 rom eeprom eeprom issue extend code area6 144 rom eeprom rom eeprom fg flag 145~151 rom eeprom rom eeprom area7 152~159 rom eeprom prom eeprom second error counter area8 160~183 rom eeprom rom can not be read eeprom password of user data area9 184~255 rom eeprom rom can not be read eeprom user data area10 256~511 rom eeprom eeprom user data(only in bl7431b )
BL7431A 256-bit eeprom logical encrypted chip http://www.belling.com.cn - 3 - 8/16/2006 total 4 pages read/write operation reading operation the address counter inside the chip use bit as coun ter-unit, at every clocks rising edge, it increases 1. at the falling edge of every clock, da ta in current address will be sent to i/o port. when clk is high and rst also is high, the address counter will be cleared to zero. add a0 a1 a2 do0 do1 io clk rst t r t h t l t r t f t d1 t d2 t d3 t d4 address reset and data output add n n+1 n+2 io clk rst t d5 n n+1 n+1 t d6 t d7 t s t hw writing operation timing diagram writing operation when rst is high and clk is low, r flag inside th e chip will be set. under such condition, when next clk arrived, the chip will enter writing proce ss with address counter no increasing. during writing operation, clk keep high. when writing oper ation is finished, at the falling edge of clk, address counter will be effective again, at the sam e time, r flag will be reset. to chip manufacture area, r flag has no use. erasing operation when writing operation is finished, if again comes a rst pulse and clk keep low, r flag will be set again and the chip enter erasing status. suc h operation to any bit of same byte has same effect. to prom area, erase is invalid. add n n+1 io clk rst t s t hw n n t d6 n t he t s t d7 erasing operation timing diagram power on reset address is reset after power on. at this time, rst must keep high than one clk period. when rst goes low, data in address zero will be sent to i/o port. about comparison of transmission password password comparison must be executed immediately af ter write 0 operation rst clk address i/o d8 1 d8 2 d103 d8 0 d0 0 1 104 81 82 80 103 td8 td9 td10 ec bit addr bit output write one bit ec ec(lsb-1) ~ec(msb-1) thw comparison of transmission password timing diagram
BL7431A 256-bit eeprom logical encrypted chip http://www.belling.com.cn - 4 - 8/16/2006 total 4 pages electrical parameter absolute maximum parameter limited value parameter symbol min typ max unit power voltage v cc -0.3 - 6.0 v input voltage v i -0.3 - 6.0 v storage temperature t s -40 - 125 esd protection vs 4000 v power dissipation p tot - - 50 mw dc characteristic limited value parameter symbol min typ max unit h input voltage (i/o,clk,rst) v h 3.5 - v cc v l input voltage (i/o,clk,rst) v l - - 0.8 v rst,clk h input current i h - - 1 m a rst,clk l input current -i l - - 1 m a l output current i l - - 0.5 ma h output current i h - - 10 m a input capacitance c i - - 10 pf power voltage v cc 4.75 5 5.5 v power current i cc - 1 - ma ac characteristic limited value parameter symbol min typ max unit clock frequency clk 50 khz clock h level t h 10 m s clock l level t l 10 m s rise time t r 1 m s fall time t f 1 m s reset hold time t r 50 m s t s 10 m s writing time t hw 5 ms erasing time t he 5 ms
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